(1) Field of the Invention
This invention relates to an integrated circuit device and, more particularly, to an integrated circuit device with a plurality of central processing units on one chip.
(2) Description of the Related Art
It is known that there are various specifications for central processing units (CPUs) included in general-purpose microcontrollers, microcomputers, and the like.
That is to say, specifications for such CPUs differ as to, for example, cache size, whether a memory management unit (MMU) or a memory protection unit (MPU) is included, whether a Java (registered trademark) accelerator is included, and whether a floating-point operation unit is included.
If CPU specifications differ, then operating systems (OSes) and the like under which CPUs can operate also differ. Therefore, one-chip large-scale integrated circuits (LSIs) have conventionally been developed and provided according to CPU specifications to meet customers' needs.
In addition, techniques, such as a dual CPU system, for forming a plurality of CPUs on one chip are disclosed (see, for example, Japanese Unexamined Patent Publication No. 58-58672, FIG. 1).
FIG. 7 shows a lineup of conventional LSIs.
Specifications for CPUs 51a and 51b differ. The same peripheral circuits (peripheral modules) 53-1, 53-2, and 53-3 are connected to a bus 52a on chip A, a bus 52b on chip B, and a bus 52c on chip C. The peripheral modules 53-1, 53-2, and 53-3 are a timer, an interrupt controller, and the like.
As shown in FIG. 7, three kinds of LSI chips (chips A, B, C) are developed according to CPU specifications. The two CPUs 51a and 51b are formed on the chip C, which is referred to as a dual CPU system.